The design and fabrication of an integrated circuit involves many different steps, many of which are commonly performed using electronic design automation (EDA) tools running on a computer. Frequently, millions and even billions of transistors can exist on a single semiconductor chip. Each transistor is composed of shapes, each for a specific function such as diffusion, polysilicon, contacts, metallization, and other structures. Other structures can be created to connect the transistors or to form other circuit elements, such as capacitors. Going through the various steps in the design process requires an understanding of the limitations of the manufacturing process. Shapes must be designed in such a way that, after the shapes are physically fabricated on a circuit, the electronic circuit functions correctly and according to specifications.
On each semiconductor chip there are numerous structures of miniscule dimension comprised of various materials in close proximity to one another. Each of those structures has a desired shape, which can be Manhattan shapes (i.e. polygons with orthogonal edges) in many cases, but also can be any arbitrary shape. The structures are formed using many different techniques. Photolithography is commonly used to create structures in the chip. One photolithographic technique for forming a set of structures in a particular layer of a chip is to deposit a layer of material and then to coat the layer with a photosensitive material. A mask is etched with a variety of shapes designed to facilitate the selective exposure of certain shapes on the photosensitive layer. Light is then shone through the mask, exposing the areas of the photosensitive material not shielded by the shapes in the mask. The exposed areas of the photosensitive material, along with, in some cases, the layer of material below those exposed areas, are then etched away. After the unexposed photosensitive material is removed, the desired structures remain. Though this is a potential semiconductor fabrication technique, many other techniques can be used to form structures in the semiconductor chip. Many of these techniques use masks, where the masks can include one or more shapes that are used to indirectly or directly create the structures on the chip. The shapes on the mask may or may not represent shapes of actual structural forms; they can have a shape that is dictated by the fabrication process and the desired shapes of the structures to be formed.
As technologies have advanced, creating semiconductors with smaller and smaller dimensions, also called feature sizes, have become a necessary part of the lithographic, mask-based fabrication process. Because lithography uses electromagnetic radiation (EMR), such as visible light or ultraviolet light, to selectively expose areas of the chip through a mask, the wavelength of the EMR directly limits potential feature sizes. For example, if the dimensions of desired features are smaller than the wavelength of the EMR used, there can be harmful interactions between the mask and the EMR, which may impact the actual shapes of the exposed areas and result in exposed shapes different from the shapes on the mask. To accommodate this, the desired shape of the final exposed area can be used to generate a desired shape of a mask element, which can be different than the desired shape of the final exposed area. In some cases, this may create mask elements with complex, non-rectilinear shapes.